PHOTONIC ACCELERATOR UNIT

The Photonic Accelerator Unit (PAU) uses photons to perform computations. The shift in compute substrate — from electrons in silicon to light — sidesteps the thermal, power, and supply-chain constraints that conventional accelerators are now hitting.

Compute-intensive workloads are now bound by physics. Power and heat are no longer engineering details — they dominate the economics of large-scale compute deployments.

A photonic substrate addresses these constraints at the foundation, rather than as an optimisation layered on top of an electronic system.

Software simulation has validated the PAU architecture end-to-end against analytical reference. Every target operation resolves within tolerance. The simulation is reproducible from first principles in publicly available tooling.

The next milestone is a tabletop prototype that demonstrates the architecture in hardware. Further technical detail is available under NDA after a deployment-partnership conversation is in place.

The conventional criticism of photonic compute — that it cannot match the numerical precision of digital silicon on demanding inference workloads — applies specifically to continuous-amplitude analog photonic architectures, where the achievable precision is bounded by the analog noise floor of the substrate.

Our architectural approach addresses inference accuracy not through analog-precision improvement, but through compositional mechanisms at the representation and algorithm layers. Software validation of the resulting system reaches floating-point parity within seed-noise on a representative inference workload at the canonical configuration. A future bench prototype build will validate the substrate-level claims directly.

The specific architectural mechanisms by which the system recovers effective accuracy are the subject of the pending US patent and the planned non-provisional conversion.

The architectural claims on this page are derived from a 2026 software validation campaign that simulates the substrate physics, the per-element arithmetic, and the full inference pipeline on representative workloads. The simulation reaches floating-point parity within seed-noise on the canonical inference workload when the full compositional architecture is engaged.

Software simulation projects an approximate halving of elementary operations per inference at matched precision against the conventional arithmetic baseline. One PAU delivers roughly 13× the per-device request throughput of a current top-tier GPU on language workloads. The advantage is the same on chat and on code generation: both workloads scale the work proportionally on PAU and GPU, so the ratio between them stays constant in this simulation.

Every quantitative claim above is backed by an open software test suite that reproduces the underlying numbers in approximately two seconds on a laptop. A future bench prototype build will validate the substrate-level claims directly.

Simulation projections against a 1000-user mixed AI workload — LLM chat, code generation, image generation, video generation, and research-document workflows — comparing a PAU deployment to a conventional inference-GPU cluster sized to serve the same load.

The throughput advantage translates directly into lower wall power and lower operating energy cost for the same workload.

The numbers below are modelled projections derived from substrate-component datasheets and the per-element arithmetic counts of the simulated architecture. A future bench prototype build will measure the per-multiply-accumulate energy directly. Modelled projections are reported with their assumptions stated, against NVIDIA H100 FP8 at the published 2.8 pJ per multiply-accumulate as the conventional baseline.

PAU is designed to be deployed alongside existing inference infrastructure, not in place of it. First-generation units operate as drop-in additions to existing racks, extending inference capacity without requiring write-off of previously procured equipment.

Subsequent generations follow a phased upgrade path: as new compute capacity is added, photonic units progressively displace traditional equipment until the site reaches a fully photonic configuration. Operators who adopt early are positioned to make that transition incrementally, rather than as a capital-write-off event.